Last updated: Mon Feb 1 12:41:38 IST 2016
Compiling for Multicore Systems
As multi-core systems are gaining popularity, there is a definite need for
languages, tools and techniques that can simplify programming high
performance machines to exploit the hardware
features to a significant level and achieve higher throughput.
Programming languages such as X10, CAF, OpenCL, and Titatnium are
part of some of the efforts in this direction.
Two of the main issues that we encounter while compiling for
multi-core systems are the following:
(a) the difference between user perceived
(ideal) parallelism and useful parallelism based on the actual
hardware, and (b) reasoning about the locality of data and computation.
Our goal is to design new optimizations techniques to improve performance and develop new tools and language extensions to help the design of parallel programs.
Performance and Programmability in OO languages
Performance and programmability are two of the most desired targets of OO languages like Java.
However, considering the typical multisite development, and two tier translation mechanism both programmability and performance take a hit.
Our goal is to design new optimizations that take advantage of the two tier translation scheme of Java (to improve performance).
Similarly, we aim to generate semi-automatic tools to improve the readability and programmability of large Java applications.
Compiling for Embedded Systems
Machine-specific optimizations are important to compiler technology because of
the significant performance improvements they can achieve.
Embedded systems prove to be an ideal play ground for applying machine-specific
optimizations owing to the fancy and specific features present in the hardware.
Among the many machine specific optimizations, register
allocation is known to be one of the most successful optimizations in the
context of traditional as well as embedded architectures.
In the past, we have identified multiple venues for improving different aspects of register
allocation techniques and derive exciting results.
Goal is to study further issues affecting the constrained environment typical of embedded systems (such as low memory, power, stack size,
number of registers etc), and develop more powerful optimizations on the way.