Hello, welcome to my home page. I am a professor in the Department of Computer Science and Engineering at Indian Institute of Technology, Madras. My current research focus is on multicore architectures, specifically, issues related to memory system design and networks-on-chip. I am associated with Programming Languages, Architecture, and Compilers Education (PACE) Lab. I am a senior member of IEEE and ACM. My Erdos number is 3 (Gheorghe Paun -> Solomon Marcus -> Paul Erdos). Prof. Madhu Mutyam
BSB 356
Dept. of CSE
IIT Madras
Chennai - 600 036
Ph: +91 44 2257 4379
Fax: +91 44 2257 4352
Email: madhu AT cse
DOT iitm DOT ac DOT in
Teaching:
  • GIAN Course: Emerging Computational Devices, Architectures and Computational Models (11-15 Dec, 2017)
  • CS1100: Introduction to Programming (F'17, F'15, S'14, S'12, S'10)
  • CS4100: Computer System Design (F'16, F'15, F'13, F'12)
  • CS4110: Computer System Design Lab (F'16, F'15, F'13, F'12, F'11)
  • CS6560: Parallel Computer Architecture (S'16, S'14, F'12, F'11, F'10)
  • NPTEL-MOOC: Computer Architecture (1st Jul - 31st Aug, 2015)
  • CS6200: Advanced Computer Architecture (S'13)
  • CS6600: Computer Architecture (S'12, S'11)
  • CS2610: Assembly Language Programming Lab (S'11)
  • CS2600: Computer Organization (S'11)
  • CS2300: Switching Theory and Digital Design (F'10, F'09, F'08)
  • CS2310: Digital Logic and Design Lab (F'10, F'09, F'08)
  • CS6230: CAD for VLSI (S'10, S'09, S'08)
Current Research Students:
  • Ph.D.
    • Gnaneswar Rao Jonna (7/2012)
    • Praveen Kumar Alapati (7/2012)
    • S.R. Swami Saranam Chongala (7/2014)
  • M.S. (Research)
    • Patil Rakesh Ravindra (1/2014)
    • Dennis Antony Varkey (1/2014)
    • Puneet Saraf (7/2016)
    • Sayantan Ray (7/2016)
    • Joe Augustine (1/2017)
Graduated Research Students:
  • Ph.D.
    • K. Raghavendra (2017) (Postdoc, School of Computing, National University of Singapore)
    • Tripti S. Warrier (2016) (Associate Professor, Dept. of ECE, Adi Shankara Institute of Engg & Tech., Kerala)
    • T.V. Kalyan (2015) (Performance Architect, IBM Bengaluru)
    • John Jose (2014) (Assistant Professor, Dept. of CSE, IIT Guwahati)
  • M.S. (Research)
    • J. Sudharsan (2017) (Technical Staff Member, VMwareSoftware, Bengaluru)
    • Pritam Majumder (2016) (PhD Student, Department of CSE, Texas A&M University)
    • Prasanna Venkatesh Rengasamy (2016) (PhD Student, Department of CSE, Penn State University)
    • Aditya Arvind Kajwe (2014) (Software Engineer, Paypal, Chennai)
    • Arpit Joshi (2011) (PhD Student, School of Informatics, University of Edinburgh)
    • Nayan Mujadiya (2011) (R&D Engineer, Synopsys Inc, Bengaluru)
    • T.V. Kalyan (2009) (Performance Architect, IBM Bengaluru)
    • Abu Saad Papa (2008) (Product Development Lead, Invention Labs, Chennai)
    • Md. Abid Hussain (2008) (Design Engineer, Xilinx, Hyderabad)
Recent Publications: (click here for the complete list)
  • Raghavendra K, Biswabandan Panda, Madhu Mutyam. MBZip: Multi-Block Data Compression. ACM Transactions on Architecture and Code Optimization (TACO), 2017 (accepted).
  • Debiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, Laxmi Narayan Bhuyan. CAMO: A Novel Cache Management Organization of GPGPUs. 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), Jeju Island, Korea, Jan 22-25, 2018.
  • Praveen Alapati, Kalyan TV, Madhu Mutyam. FatCBST: Concurrent Binary Search Tree with Fatnodes. IEEE International Conference on High Performance Computing and Communications (HPCC), Bangkok, Thailand, Dec 18-20, 2017.
  • Dennis Antony Varkey, Biswabandan Panda, Madhu Mutyam. RCTP: Region Correlated Temporal Prefetcher. IEEE International Conference on Computer Design (ICCD), Boston, USA, Nov 5-8, 2017.
  • Praveen Alapati, Swamy Saranam, Madhu Mutyam. Concurrent Treaps. International Workshop on Ultrascale Computing for Early Researchers, co-located with International Conference on Algorithms and Architectures for Parallel Processing (UCER), pp. 776-790, 2017.
  • Debiprasanna Sahoo, Manoranjan Satpathy, and Madhu Mutyam. An Experimental Study on Dynamic Bank Partitioning of DRAM in Chip Multiprocessors. IEEE International Conference on VLSI Design (VLSID), pp. 35-40, 2017.
  • Raghavendra K, Biswabandan Panda, and Madhu Mutyam. PBC: Prefetched Blocks Compaction. IEEE Transactions on Computers (TC), 65(8):2534-2547, 2016.
Technical Program Committee Member:
  • 2018: VLSI Design; ASP-DAC
  • 2017: ICCD; ISVLSI; VDAT
  • 2016: ICCD; ISVLSI; VDAT
  • 2015: ICCD; iNIS; ISVLSI; IPDPS (Architecture track); PARCOMPTECH; VLSI Design;
  • 2014: ICCD; CASES; ICPP; Memory Architecture and Organization Workshop (Program Committee Co-Chair); ISVLSI (Special Session -- Track Co-Chiar); IndoSys; VLSI Design (Track Co-Chair)
  • 2013: ICPP; VLSI Design (Track Co-Chair); ISVLSI
  • 2012: VLSI Design; ISVLSI
  • 2011: VLSI Design (Track Co-Chair); ISVLSI (Finance Chair); VLSI-SoC
  • 2010: VLSI Design; ISVLSI; VLSI-SoC
  • 2009: VLSI Design; ISVLSI

Think. Don't just do. Set aside time to explore ideas.
Thinking is more important than reading.

Last modified: 4th Oct, 2017