Energy Optimization for Data Cache Memory: Conventionally, consecutively addressed blocks are mapped onto different sets in cache. In this work, we propose a new block address mapping, Set-First Fill (SFFMap), for pipelined L1 data caches wherein consecutively addressed data blocks are mapped onto the same set. This increases the inter-block spatial locality within the cache set. In order to exploit SFFMap, we propose to store and if possible, access the most recently used set in the cache’s pipeline registers. Further, selective access (SSA) and selective update (SSU) techniques are proposed for set- buffer to increase the effectiveness of SFFMap. Our experimental evaluation for in-order and out-of-order processors with an 8- way set-associative data cache shows that SFFMap, together with SSA and SSU, achieves around 27% reduction in dynamic energy and 4-5% performance improvement. The proposed techniques need minor modifications to the existing hardware, making it an adoptable design.

Pritam Majumder, T.V. Kalyan, and Madhu Mutyam, SFFMap: Set-First Fill Mapping for an Energy Efficienct Pipelined Data Cache 32nd IEEE International Conference on Computer Design (ICCD), October 19-22, 2014, Seoul, Korea

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Multicore Data-Prefetching: Implemented a feedback directed stream prefetcher and a timely prefetcher and compared the performance with normal stride prefetcher and a delta-correlation prefetcher for both single core and multicore system, with Network On Chip (NOC), using Multi2Sim simulator.

Cache Replacement Policy: Implemented and compared different replacement policies at the presence of a stride and delta-correlation prefetcher to observe the performance dependence of the prefetcher on different replacement policies.

Modeling Simple Scalar and Super-Scalar Processor: Both are designed and modeled using Verilog HDL.

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www.parsec.cs.princeton.edu/overview.htm - Parsec Benchmark Programs and comparison with other benchmarks

www.spec.org/benchmarks.html - SPEC Benchmarks

http://www.jaleels.org - SPEC CPU2006 Memory Characterization