Welcome to my Page !!
I am a PhD scholar in the Dept. of Computer Science and Engineering at IIT Madras working under Dr. Rupesh Nasre. I am associated with the Programming Languages, Architecture and Compilers Education (PACE) lab. My research interests lie in parallel and distributed computing, and compilers. My PhD thesis focusses on locking protocols for parallel accesses to the in-memory hierarchical structures.
I completed B.Tech from Government College of Engineering, Amravati, Maharashtra. Prior to joining IIT Madras, I was working with Cognizant Technology Solutions, Pune. Please find my CV here.
We have designed a hierarchical locking benchmark to test various performance aspects of hierarchical locking. The source code and instructions for running the benchmark can be found here.
- Saurabh Kalikar, Rupesh Nasre. Toggle: Contention-Aware Task Scheduler for Concurrent Hierarchical Operations. In Proceedings of the 25th European Conference on Parallel and Distributed Computing, EuroPar 2019. doi
- Saurabh Kalikar, Rupesh Nasre. NumLock: Towards Optimal Multi-Granularity Locking in Hierarchies. In Proceedings of the 47th International Conference on Parallel Processing , ICPP 2018. doi
- Ganesh K, Saurabh Kalikar and Rupesh Nasre. Multi-granularity Locking in Hierarchies with Synergistic Hierarchical and Fine-Grained Locks . In Proceedings of 24th European Conference on Parallel Processing, EuroPar 2018. doi
- Saurabh Kalikar, Rupesh Nasre. DomLock: A New Multi-Granularity Locking Technique for Hierarchies . In ACM Transactions on Parallel Computing, TOPC, Sept 2017. (Invited article). doi
- Saurabh Kalikar, Rupesh Nasre. DomLock: A New Multi-Granularity Locking Technique for Hierarchies . In Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2016. (Distinguished paper award). doi
- Research Intern at Microsoft Research, Bangalore. (July'19 to Sept'19)
- Compiler Optimizations to Reduce Data-Shuffles in Big-Data Jobs
- Research Intern at Microsoft Research, Bangalore. (July'18 to October'18)
- Program analysis and compiler transformations for optimizing big-data jobs
- Software Engineer at Cognizant Technology Solutions, Pune. (March'13 to December'13)
Awards and Honors
- Institute Research Award, IIT Madras. (Sept 2019)
- Won the HiPC’16 Student Parallel Programming Challenge-Intel Track (Team of 3).
- Invited to attend Google’s 4th PhD Student Summit on Compiler and Programming Technology, 5-7 December, 2016, Munich, Germany.
- Distinguished paper award at PPoPP 2016.
- Travel grants:
- ACM-India student travel grant for attending EuroPar 2019 (INR 60,000)
- Kris Gopalakrishnan Endowment Student Travel Grant for attending EuroPar 2018(INR 1,50,000).
- ACM SIGPLAN Professional Activities Committee (PAC) travel grant for attending PPoPP 2016 (USD 1000).
- ACM Programming Languages Mentoring Workshop (PLMW) scholarship for attending POPL 2015 (USD 550).
- First rank in coding contest in national level technical festival, Amravati (Feb 2011).
- Email: kalikar.saurabh_AT_gmail.com, saurabhk_AT_cse.iitm.ac.in
- Office address:
BSB 331A, PACE Lab,
Department of Computer Science and Engineering, IIT Madras
Chennai, India 600 036