Introduction

This course is designed to introduce students to testing of digital circuits. The course will familiarize students with existing techniques in VLSI design. After a gentle introduction to how design errors or manufacturing errors happen in the VLSI flow, the course teaches how to test a chip for its expected functionality. The course will gently straddle into both EE and CSE domains. Manufacturing defects and faults will be abstracted as CS problems and students will learn algorithms to test a chip systematically. The course also teaches how designs can be made testable and various methods by which a circuit can be made more testable.
Exposure to VLSI design is not assumed. Students are expected to have a good understanding of digital circuits. Exposure to data structures and algorithms is desired.

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Logistics

Course Instructor
Shankar Balachandran :: BSB 349
TAs
Sasidhar Koti and Mustafa Shake
Course Timings
The class will meet 4 times a week(M @ 10, T @ 9, W @ 8 and F @ 12, Venue: CS 34). Industrial lectures and invited talks by other academicians will be arranged from time to time. Such lectures will supplement the material that is taught in the course.
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Policies

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References

The class notes are available in the ::Notes:: section. Links to software manuals, free and shareware software tools that are useful for the coursework and all reference books are listed in the ::Resources:: section.