| Title | : | Scalable Memory Safety for Concurrent Data Structures via Hardware-Software Codesign |
| Speaker | : | Dr. Ajay Singh (ICS Forth) |
| Details | : | Thu, 11 Sep, 2025 3:00 PM @ SSB 334 |
| Abstract: | : | Concurrent reclamation algorithms address use-after-free races in concurrent data structures to provide memory safety. However, these algorithms are often designed based on simplified theoretical models and fail to consider the broader system context in which they operate. For example, they overlook how memory locations are managed or synchronized at lower system layers, such as memory allocators and the cache subsystem. This isolated approach misses opportunities to leverage events occurring at these lower layers, which could solve the same problem more efficiently. In this talk I will present a hardware-software co-design approach to address concurrent memory reclamation in concurrent data structures. The synchronization needed for concurrent memory reclamation already occurs at the cache level through coherence protocol messages. Therefore, instead of duplicating this mechanism at the application level, we can harness these cache-level messages and expose them to programmers, offering a more efficient solution. More details of the work appear in IPDPS 2023 paper titled: "Efficient Hardware Primitives for Immediate Memory Reclamation in Optimistic Data Structures". |
