CS2300: Introduction to Computer System Design
Latest Offering: Diwali'23 (July - Nov, 2023)Instructor: Ayon Chakraborty
Teaching Feedback (TFC Scores): Diwali'22, Diwali'23, Online BS
My primary goal is to help students design and implement a very simple yet functional processor microarchitecture from the first principles. The course is divided into two components - (a) Digital Design, and (b) Processor Design. First, we introduce digital logic related fundamentals along with equipping students with design skills for logic circuits. Second, we introduce the concept of stored program execution connecting the dots among instruction set architecture, machine code and a hardware platform capable of storing and executing the code. In the following, there is an approximate lecture-wise breakdown of the topics taught. The video playlist is a part of the computer systems design course offered as a part of the online BS Data Science program (systems bucket) at IIT Madras.. The course materials are only available via Moodle.
Module 1 (Introductory Topics)
Computing System
Lecture 1, Continue from CS1111. Source code, compilation, disassembly (live) and machine code. Tell students we will design a simple but complete computer from first principles at a logic circuit level.
Lecture 2, What is a computer? Old generation to smartphones, Moore's Law
Lecture 3, Why digital? Information Representation
CMOS Transistors and Logic Gates
Lecture 4, Transistors as switches, Two state abstraction, Switching logic, CMOS (NMoS + PMoS)
Lecture 5, Realization of a NOT gate, NAND, NAND + NOT = AND, Transistor Networks
Lecture 6, Tutorial on CMOS implementation of Boolean Functions (worked out in class, eg XOR)
Lecture 7, Timing/delays (propagation, contamination), Fan-outs, Power Consumption - static/dynamic, big picture of VLSI
Module 2 (Combinational Logic Design)
Self-study (prerequisites): Boolean Algebra Basics, notes will be provided, Axioms, Distributive law, De Morgan etc.
Lecture 8, Work out numericals on boolean algebra expression simplification
Lecture 9, Canonical Logic Expressions (SOP, POS)
Lecture 10, Example are solved in class from past GATE papers
Lecture 11, What kind of combinational circuits would be required for a computer we will design? Thought exercises. Concept of ALU.
Lecture 12, mux (sw: if-else), demux (sw: switch-case), encoder (sw: indexing/compression), decoder (sw: lookup tables, expansion), priority encoder – draw parallels with their s/w knowledge
Lecture 13, Binary addition and adder (half and full), negative number representation
Lecture 14, 1/2's complement - why does it work? Extending the adder circuit to perform subtraction
Lecture 15, Circuit Simplification (K-maps), Concept of glitches, How simplification helps in glitch free design.
Lecture 16, 7-segment LED logic, Misc design problems
Lecture 17, PLA based design (microcoding truth tables), homework problems
Module 3 (Sequential Logic Design)
Sequential Logic Elements (Latches, Flip-Flops)
Lecture 18, Circuits with feedbacks, R-S and Gated D-Latch, Excitation tables
Lecture 19, Gated D-Latch and D-Flip-Flop, Clocking, Excitation tables
Lecture 20, JK latched-version & racing (toggles), Master-slave based design
Principles for Designing Sequential Logic Circuits
(We will primarily focus on synchronous clock based design)
Lecture 21, Design a 2-bit up and down counter using MS-JK
Lecture 22, T-flipflop, Discussion on D/T/JK based seq. circuit design, ASM charts
Lecture 23, D/T/JK based sequential designs, up/down counters
Counters, Frequency Dividers and Registers
Lecture 24, BCD counters, Johnson and Ring counters, Frequency Dividers
Lecture 25, Registers, Shift Registers and its applications
Lecture 26, Register based memory organization/addressing, Register interconnections (bus design, tri-state buffers), introduce how ALU can use register banks as temporary scratchpad
Finite State Machine (FSM) Design
Lecture 27, Introduction to FSMs, Traffic Light Controller Case Study
Lecture 28, FSM Design (Moore vs Mealy), Practice Problems
Lecture 29, FSM as a sequence detector - practice
Lecture 30, FSM misc. problems (e.g., coin change, vending machine) - practice
Module 4 (Computer System Design)
Includes concepts taught in lab, understanding microinstructions or control words, automation of control signals as desired by an instruction, design of the overall control unit circuit (both microprogrammed and as hardware FSM). A long session (workshop style, typically on a weekend) is conducted to clarify all implementation doubts, many students were almost done implementing their ISA on Logisim. Verilog is also introduced.
Lecture 31, History of CPU evolution, PC Revolution (1960s - 1990s), Mainframes, Minicomputers, Microcomputers to PCs, (IBM S/360, PDP - 1/8/11, Altair 8800, MOS 6502 (birth of Microsoft and Apple), Xerox Alto UI, Intel x86, Contribution of Wipro Infotech, Recommended reading: CHIP Wars
Includes concepts taught in lab, understanding microinstructions or control words, automation of control signals as desired by an instruction, design of the overall control unit circuit (both microprogrammed and as hardware FSM). A long session (workshop style, typically on a weekend) is conducted to clarify all implementation doubts, many students were almost done implementing their ISA on Logisim. Verilog is also introduced.
Lecture 31, History of CPU evolution, PC Revolution (1960s - 1990s), Mainframes, Minicomputers, Microcomputers to PCs, (IBM S/360, PDP - 1/8/11, Altair 8800, MOS 6502 (birth of Microsoft and Apple), Xerox Alto UI, Intel x86, Contribution of Wipro Infotech, Recommended reading: CHIP Wars
Lecture 33, From s/w (high level lang) to h/w (machine code), Concept of ISA, Gajendra-1 instructions (4-bit opcode), Assembly language
Lecture 34, Stored program execution. Fetch (PC, MAR), Decode (Instruction Decoder)
Lecture 35, Stored program execution. IR, MAR, MDR, and memory
Lecture 36, Manually generating control signals (with clock strobes) to move data across memory, bus and registers as desired. Multiplication using repeated addition done using manual control signal generation.
Lecture 37, Software based control logic, Ring counter in control circuit, T-states (multicycle)
Lecture 38, Implementation details for Gajendra-I, Logisim demo
Lecture 39, Implementation details for Gajendra-I, Logisim demo, Control Logic as FSM (H/W)
Lecture 40, Programming Gajendra-1, Multiplication, Fibonacci, Arithmetic Series Display (loops)
Lecture 41, Addressing Modes, Discussion of function call, Call stack
Lecture 42, Course conclusion and summary, Homebrew CPU projects.
Final Computer Design Exercise: Gajendra-1 CPU
With this design skills we conclude the course and expect them to smoothly switch over to the CS2600 course (Computer Organization and Architecture). Roadmap:
CS2300: How to design and build a computer that can execute code? design for bare functionality
CS2600: How to design (and/or build) a computer that can execute code efficiently? design for performance
CS6600: How to improve performance incorporating the state-of-the-art recipes in architecture? state-of-the-art design
Books:
Morris M Mano, Digital Logic and Computer Design (primary reference)
Harris and Harris, Digital Design and Computer Architecture (primary reference)
Malvino and Brown, Digital Computer Electronics (additional reference)
Prosser and Winkel, The Art of Digital Design (extra read, one of my favourite books) PDF