Dr. Shankar Balachandran
Associate Professor, Dept. of Computer Science and Engineering, IIT Madras

Research Interests

Computer Architecture

Multicore microarchitecture, Last-level cache management, Prefetchers, Parallel and irregular applications, NoCs

High Performance Computing

Numerical methods and linear algebra, Approximate computing, Auto-parallelization, High Performance Compilers, GPUs

VLSI Design Automation

Analytical Placement, Convex Optimization, Parallel CAD, Logic Synthesis

Parallel Algorithms and Concurrent Programming

Parallelization of graph algorithms, Performance/energy tradeoffs in parallel applications, Concurrent data-structures

Digital VLSI

Delay modeling and library characterization, Trojans and physically uncloneable functions, FPGA implementations

Recent Publications

• B.N.B. Ray and Shankar Balachandran, A Recursive Model for Smooth Approximation to Wirelength and its Impact on Analytical Placement, accepted for publication at International Conference on VLSI Design 2015.
• Biswabandan Panda and Shankar Balachandran, XStream: Cross-core Spatial Streaming based MLC Prefetchers for Parallel Applications in CMPs, PACT 2014.
• Biswabandan Panda and Shankar Balachandran, Introducing Thread Criticality Awareness in Prefetcher Aggressiveness Control, DATE 2014.
• A. Trinadh, Seetal Potluri, Shankar Balachandran, C Babu, V. Kamakoti, XStat: Statistical X-Filling Algorithm for Peak Capture Power Reduction in Scan Tests, JOLPE, Vol. 10. N0 1, pp.1--9, March 2014
• Nihar Rathod, Shankar Balachandran, Neel Gala, CAERUS: An Effective Arbitration and Ejection Policy for Routing in an Unidirectional Torus, INA-OCMC 2014.
• Seetal Potluri, S.T. Adireddy, C. Rajamanickkam and Shankar Balachandran, LPScan: An Algorithm for Supply Scaling and Switching Activity Minimizationi During Test, ICCD 2013 [Poster].
• Biswabandan Panda and Shankar Balachandran, Thread Criticality Driven Prefetcher Throttling, PACT 2013 [ACM SRC Poster].
• Madhur Amilkanthwar and Shankar Balachandran, CUPL: CUDA Uncoalesced Memory Access Pattern Locator, ICS 2013. [ACM SRC Silver Medal Winner]
Jobin J. Kavalam, V. Sudarshan, Nitin Chandrachoodan and Shankar Balachandran, IITiMer: A Parallel Engine for Variability Aware Statistical Timing Analysis,TAU Workshop 2013. [First Prize Winner]
• B.N.B. Ray and Shankar Balachandran, An Efficient Wirelength Model for Analytical Placement, DATE 2013 [Inter-active Presentation].
• Ankit Kagliwal, Shankar Balachandran, Area Complexity Metrics Using Boolean Difference, VLSI Design 2013. [Best Paper Nominee]
• Biswabandan Panda, Shankar Balachandran, CSHARP: Coherency and Sharing Aware Replacement Policy for Parallel Applications, SBAC-PAD 2012.
• Ashok Gautham, Kunal Korgaonkar, SLPSK Pathanjali, Shankar Balachandran, V. Kamakoti, The Implications of Shared Data Synchronization Techniques on Multi-core Energy Efficiency at HotPower 2012 - Usenix Workshop on Power-Aware Computing and Systems.
• Biswabandan Panda, Shankar Balachandran, Hardware prefetchers for emerging parallel applications, PACT 2012
• Sharmistha, Madhur Amilkanthwar, Shankar Balachandran, Augmentation of Programs with CUDA Streams, ISPA 2012
• Ankit Kagliwal, Shankar Balachandaran, Set Cover Heuristics for Two Level Logic Minimization, VLSID 2012.
• B.N.B. Ray, Shankar Balachandran, A New Wirelength Model for Analytical Placement, ISVLSI 2011.

Research Openings

If you are interested in a research position, please contact me by email. Send in a detailed CV along with your area of interest and if possible even a brief proposal or a problem statement.