PhD student in Department of Computer Science and Engineering at Indian Institue of Technology, Madras working under the guidance of Dr. Madhu Mutyam in the field of Computer Architecture.
Areas of Interest
- Multicore Processors - Shared Cache Management
- Cache Replacement Policies
- Cache Partitioning
- Energy efficient Designs
- Network On Chip Architectures
- Memory Systems in CMP
- Emerging Memory Technologies
Courses Completed
- Computer Architecture
- CAD for VLSI
- Mathematical Concepts for Computer Science
- Advanced Data Structures and Algorithms
Publications
- Raghavendra, Tripti Warrier, and Madhu Mutyam, SAMO: Store Aware Memory Optimizations, ACM International Conference on Computing Frontiers (CF), May 20-22, 2014, Cagliari, Italy. pdf link
- Tripti S Warrier, Anupma B, Madhu Mutyam, An Application-aware Replacement for Last-level Cache, International Conference on Architecture of Computing Systems (ARCS), February 19-22, 2013, Prague, Czech Republic.pdf link
- Raghavendra K, Tripti S Warrier, Madhu Mutyam, SkipCache: Miss-rate aware Cache Management, ACM Student Reasearch Competetion in International Conference on Parallel Architectures and Compilation Techniques (PACT), September 19-23, 2012, Minneapolis, USA. pdf link
- C. J. Janraj, Venkata Kalyan T, Tripti Warrier and Madhu Mutyam, Way sharing set associative cache architecture, International Conference on VLSI Design (VLSID), January 7-11, 2012, Hyderabad, India.pdf link